Creating an FIR Filter Channel Divider [Part 1]
I'm going to create an FIR filter channel divider.
Until now, I have been using a channel divider with a 6-channel IIR filter (Linkwitz-Riley 48) using DCX2496, and a channel divider with an FIR filter (equivalent to Linkwitz-Riley 96 dB/oct) using miniDsp miniSHARC. However, I felt that the DCX2496 had subpar analog performance and wanted to surpass the Linkwitz-Riley 48 using IIR filters. I was also concerned about phase rotation in IIR filters and the limited input capability of 24-bit/96kHz. On the other hand, miniDsp miniSHARC had limitations in the number of TAPs available for FIR filters and had certain issues such as occasional popping noise with specific gains on the digital volume (possibly due to a bug in the DSP program). It seemed to operate reliably only up to 24-bit/96kHz (struggling with modern data formats like 192kHz, which may be attributed to the design of my surrounding circuits). There was still room for improvement in these aspects.
Although I was satisfied with the sound quality at the time...
I still wanted to dive deeper!
So, here's the plan...
The envisioned specifications are as follows:
Input: SPDIF (optical, coaxial), devices with I2S output (such as Amanero Combo384, Raspberry Pi + Volumio, etc.), up to approximately 32-bit/192kHz
Internal processing: 32-bit/96kHz (considering the option of 48kHz as well; it seems to be the performance limit of the DSP for a convenient setup)
Output: 32-bit/96kHz, 4-way I2S (total of 8-channel output)
Filter: FIR filter (aiming to use around 2000 TAPs for the low-end)
Delay: Each channel
Equalizer: Parametric equalizer (overall × 10, each channel × 10)
Gain adjustment: Overall (up to 0dB), left/right (±15dB), each channel (±15dB)
Phase inversion: Each channel
Mute: Each channel
Roughly speaking, in terms of speaker management, I want to try everything that can be done with BEHRINGER DCX2496 and miniDsp miniSHARC.
Design philosophy:
Since I don't want to compromise too much, I would like to meet the above specifications as much as possible using combinations of commercially available boards without requiring excessive soldering. I'm not a devotee of MCLK, so I don't have a particular preference for it. Many I2S-related blogs delve into how clean they can make MCLK, but based on my experience with miniDSP miniSHARC, I honestly don't know if the presence or absence of MCLK or a jitter cleaner has any significant impact. I'm willing to settle for a 192kHz input. After all, the internal DSP processing is likely limited to 96kHz, so no matter how much I raise the input, it will ultimately be downsampled to 96kHz internally. However, with the increasing availability of 192kHz content these days, I want to ensure that the input capability is supported. That being said, I'm excited to gather the necessary materials and proceed with the implementation!