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TCAD simulations performed by Gold Standard Simulations Ltd (Glasgow, Scotland) revealed that fully depleted FinFET style transistors made on SOI wafers fared better in terms of leakage current—allowing only between half and one-third the leakage current of FinFETs made on bulk silicon.
Prof. Asen Asenov, CEO of GSS, has written a series of blogs on the company's website discussing simulations of FinFETs that use the company's simulation tools. A starting point was shape of Intel's FinFETs in a 22nm bulk silicon process. The simulations are performed using the company's Garand statistical 3-D TCAD simulator. He came to the conclusion that Intel may find it necessary to move to FinFET-on-SOI to shrink its process below 22nm with battery like IBM 08K8199 Battery , IBM 08K8198 Battery , IBM 08K8197 Battery , IBM 92P1075 Battery , IBM ThinkPad R40 Battery , IBM ThinkPad R32 Battery , IBM 02K6928 Battery , IBM 02K7054 Battery , IBM ThinkPad A20 Battery , IBM ThinkPad A20M Battery and that foundries yet to introduce FinFET processes would be advised to pay attention.